1. Field of the Invention
The present invention relates generally to a method for manufacturing a semiconductor integrated circuit, more particularly, to a method adopting metal hard mask for manufacturing a semiconductor integrated circuit.
2. Description of the Prior Art
In the fabrication of semiconductor integrated circuits (ICs), semiconductor devices are generally connected by several metallic interconnecting layers commonly referred to as multi-level interconnects, and damascene process has been deemed a convenient and predominant method for forming the multi-level interconnects. Principally, the damascene process includes etching a dielectric material layer to form trench and/or via patterns, filling the patterns with conductive materials such as copper, and performing a planarization process. Thus a metal interconnect is obtained. According to the patterns located in the dielectric layer, the damascene process is categorized into trench-first process, via-first process, partial-via-first process, and self-aligned process.
The conventional method for manufacturing a dual damascene structure first provides a substrate having a conductive layer formed therein. Then, a multilayered dielectric structure and a metal hard mask are sequentially formed on the substrate. The metal hard mask is subsequently patterned to form an opening and followed by performing an etching process to etch the multilayered dielectric structure to form a trench pattern or via pattern for the dual damascene structure. It is noteworthy that during forming the opening or during the etching process, contaminations such as fall-on particles are always formed. The fall-on particles are attracted to the metal hard mask by the Van der Waals force between itself and the metal hard mask. Consequently, the fall-on particles adhere to the metal hard mask or are attracted to around the metal hard mask. Therefore, the conventional cleaning process cannot remove the fall-on particles and the fall-on particles may significantly obstruct the following performed etching process. Consequently, the obtained trench opening is shrunk or made incomplete due to the fall-on particles. Such defects further arises line broken issue because the metal used to fill the incomplete trench opening inherits the incompleteness, and thus the reliability of the metal interconnection is adversely impacted.